Staff Digital Design Engineer
Core
Leading the design and development of digital subsystems within complex mixed-signal ICs, from initial concept through to lab validation.
Role type
Staff Digital Design Engineer (mixed-signal ICs)
Builds
Low Power Wide Area Network (LPWAN) wireless solutions for industrial, infrastructure, and consumer markets
Domain
Semiconductor / Wireless Communications / Mixed-Signal IC Design
Deliverable
production ML models | product features
Required skills
Digital IC design (frontend-to-backend flow, timing closure, low-power techniques), CPU-based architectures (ARM, RISC-V, STM32), RTL design (SystemVerilog, Verilog, VHDL), EDA tools (Synopsys, Cadence, Siemens), Verification methodologies (UVM/OVM, formal verification), Hardware interfaces (I2C, I3C, SPI, MIPI)
Preferred skills
Wireless communication systems (BLE, IEEE 802.15.4), Transceiver architectures, Cryptographic block design, FPGA design and validation, Embedded firmware, Analog interaction modeling
Technologies
SystemVerilog, Verilog, VHDL, Python, Tcl, Perl, Synopsys, Cadence, Siemens, Git, ARM, RISC-V, STM32, I2C, I3C, SPI, MIPI, UVM, OVM
Responsibilities
Design and implement digital subsystems including CPU-based architectures, FSMs, interconnects, and peripherals; Define and architect digital system blocks; Collaborate with analog design teams to define interfaces; Debug and analyze RTL and verification issues; Support block-level and chip-level verification activities; Contribute to lab validation and product qualification; Drive continuous improvement of design methodologies and tools
Seniority
Staff, hands-on IC design with strategic influence