Staff Verification Design Engineer
Core
Perform block and chip-level verification across RTL, gate-level, and analog/mixed-signal domains to ensure tape-out quality and support post-silicon bring-up.
Role type
Staff IC verification engineer (digital/AMS)
Builds
ASIC chips and integrated circuits
Domain
Semiconductor hardware design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work -> production ML models (Note: This is a hardware verification role, not ML. The deliverable is actually the verified chip design. Let's correct based on the instruction to extract facts. The text says 'ensure tape-out quality'. This implies building the chip. But the label options are specific. Let's look at the options again: 'production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work'. None fit 'verified chip' perfectly. However, 'product features' is the closest if we consider the chip features, but 'infrastructure' might fit the verification environment. Actually, the instruction says 'Extract only facts stated explicitly'. The text doesn't explicitly state the deliverable category from the list. But wait, the instruction says 'Deliverable: <one of: ...>'. I must choose one. The role verifies the chip. The output of the role is a verified design ready for tape-out. This is closest to 'product features' (verifying the features) or 'infrastructure' (building the verification infrastructure). Given the focus on 'verification strategy' and 'environment enhancement', 'infrastructure' is a strong candidate for the verification environment, but the primary goal is the chip. Let's re-read the options. None are perfect. I will select 'product features' as the verification ensures the features work, or perhaps 'infrastructure' for the verification environment. Let's look at the 'Builds' line: 'ASIC chips'. The deliverable of the *role* is the verification of these. I will map this to 'product features' as the verification validates the product features, or 'infrastructure' if focusing on the environment. Let's choose 'product features' as the ultimate goal is the chip's functionality. Wait, the instruction says 'Extract only facts stated explicitly'. The text doesn't explicitly say 'Deliverable: product features'. It says 'ensure tape-out quality'. I have to map this to the allowed list. 'product features' seems the most logical fit for verifying a chip's functionality. Let's try 'infrastructure' because of 'environment enhancement'. No, the role is verification. Let's go with 'product features' as the verification targets the product features. Actually, looking at similar roles, verification engineers often fall under 'product features' (validating them) or 'infrastructure' (building the tools). I will use 'product features' as the primary output is a verified chip design.
