Sr ASIC Design Engineer - TeraWave
Core
Design and develop FPGAs, digital ASICs, and mixed-signal ASICs for Blue Origin's TeraWave satellite communications network.
Role type
Senior IC ASIC Design Engineer
Builds
High-speed satellite communication hardware (FPGAs, ASICs)
Domain
Aerospace / Satellite Communications / Digital Design
Required skills
ASIC design, FPGA design, HDL programming (VHDL, Verilog, SystemVerilog), verification methodologies, timing analysis, Linux development environment
Preferred skills
Full ASIC/FPGA lifecycle experience, Software-Defined Radio Architectures, ADC/DAC/DSP experience, RTL2GDSII physical design flows, DFT/Scan/MBIST/LBIST methodologies, mentoring
Technologies
VHDL, Verilog, SystemVerilog, Python, TCL, Perl, EDA tools
Responsibilities
Design and develop FPGAs, digital ASICs, and/or mixed-signal ASICs; Implement designs using HDL; Develop verification methodologies and test benches; Create and execute test plans; Conduct timing and noise analysis; Collaborate with cross-functional teams; Support lab integration and troubleshooting
Seniority
Senior, hands-on IC
