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Principal FPGA Designer – TeraWave

Greater Seattle Area💼 Full-time💰 $249,235–$249,235🗓 2026-09-10 → 2026-09-26

Core

Lead the full lifecycle design, development, and verification of complex FPGA-based systems for high-speed data processing and communications in next-generation space systems.

Role type

Principal FPGA Designer (Space Systems)

Builds

FPGA-based subsystems for TeraWave satellite communications network

Domain

Aerospace / Satellite Communications / High-Speed Digital Design

Deliverable

production ML models | product features | infrastructure

Required skills

VHDL, Verilog, System Verilog, FPGA architecture definition, RTL design, functional simulation, synthesis, place-and-route, timing closure, hardware bring-up, verification environment development, DFT/DFM, high-speed digital design principles, SERDES interfaces, DSP architectures, hardware/software co-design

Preferred skills

Space-grade design practices (SEE mitigation, TMR, scrubbing), formal verification tools, UVM-based constrained-random verification, modem development, mentoring engineers

Technologies

AMD Versal, IGLOO, PCIe, GTH/GTY transceivers, EDA tools

Responsibilities

Lead FPGA designs through full development lifecycle; develop comprehensive verification environments; partner with stakeholders to define interfaces; support hardware integration and troubleshooting; conduct design reviews; mentor junior engineers; evaluate FPGA devices and IP cores; contribute to program planning and risk mitigation; develop design documentation and test plans.

Seniority

Principal, technical leadership & mentorship

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