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Sr Principal Design Engineer

SAN JOSE💼 Full-time💰 $154,000–$154,000🗓 2026-07-28 → 2026-09-27

Core

Senior Solutions Engineer developing hardware emulation and FPGA prototyping platforms for semiconductor customers, bridging R&D and customer needs to solve complex high-speed protocol challenges.

Role type

Senior IC Solutions Engineer (Hardware Emulation & FPGA Prototyping)

Builds

Palladium and Protium hardware emulation and FPGA prototyping platforms

Domain

Semiconductor / Hardware Verification / High-Speed Protocols

Required skills

Digital design fundamentals, Computer architecture, System-level verification, Simulation (Advanced Testbench), Emulation (TBA & ICE), FPGA Prototyping, Hardware description languages (SystemVerilog/Verilog), C/C++, High-speed interface protocols (PCIe, CXL), Root-cause debugging, Waveform/log analysis

Preferred skills

None stated

Technologies

Palladium, Protium, SystemVerilog, Verilog, C, C++

Responsibilities

Collaborate with customers and engineering teams to develop and optimize advanced protocol solutions; Define and develop customer-specific emulation and prototyping requirements for leading-edge interfaces; Drive development of acceleration FW + FPGA system solutions and verification methodologies; Triage and resolve complex systemic issues across hardware/software boundaries; Lead technical evaluations and develop high-performance benchmarks; Create and deliver technical presentations and product demonstrations.

Seniority

Senior, hands-on IC

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