Custom Layout Designer (Analog Layout Designer)
Core
Designing high-speed, high-accuracy analog cells, blocks, and IP blocks for leading foundry nodes.
Role type
Senior IC analog layout designer
Builds
High-quality IP and test-chips for global circuit design groups
Domain
Semiconductor manufacturing / Analog microelectronics
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Analog layout techniques (matching, shielding), layout effects analysis (speed, capacitance, power, area), Cadence Virtuoso Layout, physical verification tools, coding skills
Preferred skills
Microelectronics design requirements understanding, latest node process methodologies
Technologies
Cadence Virtuoso, PVS
Responsibilities
Implement high-speed/high-accuracy cells and IP blocks, build layout methodologies for leading foundry nodes, collaborate with circuit designers globally, work with R&D teams on layout editing and verification tools
Seniority
Senior, hands-on IC
