Software Engineer II: PCle VIP R&D
Core
Developing and validating PCIe Verification IP to enable verification of interface protocols for electronic design automation.
Role type
Software Engineer II (Verification IP)
Builds
PCIe verification IP and reusable software solutions
Domain
EDA (Electronic Design Automation) / Semiconductor / Protocol Verification
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
C/C++ development, object-oriented programming, algorithm design, data structures, graph algorithms, advanced debugging, protocol specification analysis
Preferred skills
PCI Express (PCIe) protocol knowledge, USB/NVME/SATA/Display Port protocols, Verilog/System Verilog, OVM/UVM methodologies, digital logic design, IP/SoC verification flow, EDA tool flow
Technologies
C, C++, Verilog, System Verilog, OVM, UVM
Responsibilities
Develop software for PCIe Verification IP, validate interface protocols, collaborate with multi-site teams, contribute to technical roadmap and training
Seniority
Mid-level, hands-on IC
