Senior Principal Functional Verification Engineer - Applied ML
Core
Architect, design, and validate next-generation verification methodologies for pre-silicon functional verification using AI and agentic AI solutions.
Role type
Senior Principal Functional Verification Engineer (Applied ML)
Builds
AI-enhanced Electronic Design Automation (EDA) tools and agentic AI solutions for chip design and verification.
Domain
Semiconductor / Electronic Design Automation (EDA) / Artificial Intelligence
Deliverable
production ML models | product features
Required skills
Pre-silicon ASIC verification (Formal, SV/UVM, OVM), Debugging pre-silicon verification failures, EDA tools (Jasper, Xcelium, IMC), Verilog, System Verilog, Python, LLMs, ML technologies (RAG, RFT, RL, Agentic frameworks)
Preferred skills
Experience with RAG, RFT, RL, and Agentic frameworks
Technologies
Jasper, Xcelium, IMC, LLMs, RAG, RFT, RL
Responsibilities
Contribute to applying machine learning techniques to streamline pre-silicon functional verification; Develop agentic AI solutions using LLMs to accelerate verification; Employ AI-enhanced EDA tools to improve design and verification lifecycles; Engage with customers to understand requirements and deliver verification strategies; Collaborate with ML and software engineering teams to validate output correctness; Maintain knowledge of AI-powered hardware verification advancements.
Seniority
Senior Principal, hands-on IC
