Senior Engineer, Digital Design Engineering
Core
Senior Digital Design Engineer responsible for FPGA prototyping, RTL design, and architectural specification of complex SoC blocks for the Intelligent Edge.
Role type
Senior IC Digital Design Engineer (FPGA/SoC)
Builds
FPGA prototypes, RTL designs, and IP blocks for semiconductor solutions
Domain
Semiconductor / Digital Design / FPGA
Deliverable
production ML models | product features
Required skills
FPGA development flow, Verilog/SystemVerilog RTL design, AHB/AXI protocols, ARM processor architecture, timing/power/area optimization, UVM verification, mixed-signal co-simulation, static timing analysis, CDC analysis
Preferred skills
Intellectual Property (IP) block design and integration, architectural design of complex systems, low-power design methodologies
Technologies
FPGA, Verilog, SystemVerilog, UVM, ARM cores, AHB, AXI
Responsibilities
Perform FPGA prototyping and develop self-checking mechanisms; Architectural design and specification of blocks; RTL design meeting timing, area, and low-power targets; Interaction with verification, analog, and implementation teams; Perform timing, power, and CDC analysis; Verification of blocks using UVM; Mixed-signal integration and verification
Seniority
Senior, hands-on IC
