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DRAM Technology Modeling Engineer

Santa Clara,CA💼 Full-time💰 $152,000–$152,000🗓 2026-06-18 → 2026-07-30

Core

Developing predictive process and device models for emerging memory technologies (DRAM) and future 2nm architectures using TCAD to improve system Power, Performance, and Area.

Role type

Senior IC DRAM Technology Modeling Engineer

Builds

Predictive models for advanced Logic-Memory devices and scaled interconnects

Domain

Semiconductor manufacturing / Materials engineering

Deliverable

production ML models | product features

Required skills

TCAD modeling (Sentaurus Process/Device/Interconnect, Victory), advanced CMOS model development and calibration, solid-state device/semiconductor physics, hardware correlation, cross-functional collaboration

Preferred skills

Leadership skills

Technologies

Sentaurus Process Explorer, Sentaurus Raphael, Sentaurus Topo, Silvaco Victory Process, Silvaco Victory Device

Responsibilities

Develop process and device models for emerging memory and future 2nm technologies; perform calibration simulations and hardware correlations; interact with technical staff to address key issues for performance and scalability

Seniority

Senior, hands-on IC

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