Product Architectural Model Development Leader
Core
Lead the creation, quality, and evolution of behavioral and architectural models that represent next-generation FPGA silicon before and during RTL development, serving as the single source of truth for architects, verification teams, RTL designers, and software/compiler teams.
Role type
Senior IC Product Architectural Model Development Leader
Builds
Executable, simulatable behavioral models of FPGA fabric, hard IP, and system-level behavior
Domain
Semiconductor / FPGA Architecture
Deliverable
production ML models
Required skills
Behavioral modeling (C++, SystemC, Python), FPGA/ASIC architecture fundamentals, Technical leadership, Cross-functional collaboration, Simulation infrastructure management, Model-RTL equivalence reasoning
Preferred skills
FPGA-specific architecture (embedded memory, transceivers, NoC), Performance/pathfinding modeling, Spec-to-model automation/codegen flows, Formal methods, Early software/compiler enablement
Technologies
C++, SystemC, Python, SystemVerilog, UVM, Quartus
Responsibilities
Lead a team of behavioral modeling engineers; Define modeling methodology and coding standards; Partner with silicon architects to translate specs into executable models; Collaborate with verification teams for golden-reference checking; Drive early customer enablement via pre-silicon functional simulation; Establish simulation infrastructure and regression frameworks; Hire, mentor, and grow the modeling team.
Seniority
Senior, hands-on IC with team leadership
