FPGA Post Silicon Validation Engineer - HPS USB
Core
Lead device-level and system-level validation of HPS USB subsystems for next-generation FPGA SoC devices, ensuring high reliability, interoperability, and performance.
Role type
Senior IC FPGA post-silicon validation engineer (USB/HPS)
Builds
Robust HPS USB subsystems for FPGA SoC devices
Domain
Semiconductor / FPGA SoC / USB Protocol
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Post-silicon validation, USB 2.0/3.x protocol expertise, system bring-up, silicon debug, root-cause analysis, automation framework development, hardware-software interaction debugging
Preferred skills
FPGA SoC architecture knowledge, embedded processor subsystem validation, Linux environment validation
Technologies
Python, TCL, Bash, LeCroy Voyager, Total Phase, oscilloscopes, logic analyzers, JTAG debuggers, USB compliance tools
Responsibilities
Develop and execute post-silicon validation strategies for HPS USB subsystems; Perform system bring-up and debug of HPS subsystems focusing on USB connectivity and protocol compliance; Create and execute test plans for USB protocol validation, interoperability testing, stress testing, and corner-case scenarios; Debug silicon issues using protocol analyzers, oscilloscopes, and validation lab equipment; Drive root-cause analysis and issue triage across silicon, firmware, software, and platform components; Develop automation frameworks and regression environments using scripting languages
Seniority
Senior, hands-on IC
