Design Verification Engineer
Core
Performs functional logic verification of FPGA designs to ensure they meet microarchitecture specifications and uncover bugs before silicon.
Role type
Design Verification Engineer (FPGA)
Builds
FPGA designs and complex IPs/SOCs
Domain
Semiconductor hardware design and verification
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
System Verilog, OVM/UVM, constrained random verification, gate-level simulation, power-aware simulation, verification architecture, test plan execution, debug, coverage closure, FPGA prototyping
Preferred skills
Experience in FPGA architecture, pre-silicon validation
Technologies
System Verilog, OVM, UVM, gate-level simulation tools
Responsibilities
Develop FPGA verification plans, test benches, and verification environments; execute verification plans and run system simulation models; replicate and debug issues in pre-silicon environments; implement corrective measures for failing tests; collaborate with FPGA architects, RTL developers, and physical design teams; document test plans and drive technical reviews; maintain and improve functional verification infrastructure and methodology.
Seniority
Mid-level, hands-on IC
