Senior FPGA IP Solution Design Engineer
Core
Designing, developing, and verifying wireless IP cores for FPGA platforms to deliver high-performance wireless solutions.
Role type
Senior IC FPGA IP design engineer (wireless protocols)
Builds
Wireless IP cores for Altera FPGA devices
Domain
Telecommunications / High-speed digital design
Deliverable
production ML models | product features
Required skills
Verilog/System Verilog, RTL design, FPGA architecture, RTL verification, high-speed serial interfaces (Ethernet, CPRI, eCPRI), timing closure, clock domain crossing, FPGA constraints
Preferred skills
O-RAN architectures, Perl/TCL/Python/shell scripting, ASIC design experience
Technologies
Altera FPGA, Synopsys VCS, Questa, Modelsim
Responsibilities
Participate in high-level product specifications, perform logic/RTL design and implementation, conduct RTL verification, execute IP FPGA emulation prototyping, perform hardware validation
Seniority
Senior, hands-on IC
