DSP Design Engineer
Core
Design and implement high-performance, parameterizable DSP IP for next-generation FPGAs, covering microarchitecture, RTL coding, synthesis, and physical design.
Role type
Senior IC DSP Design Engineer
Builds
High-performance DSP IP cores for FPGA families
Domain
Semiconductor / FPGA / Digital Signal Processing
Deliverable
production ML models
Required skills
DSP topology analysis, high-speed arithmetic circuit design, RTL coding, static timing analysis (STA), timing closure, power optimization, formal verification, logic equivalence checking, EDA tool proficiency (PrimeTime, Design Compiler, PnR)
Preferred skills
Fixed-point, floating-point, and tensor arithmetic operations
Technologies
PrimeTime, Design Compiler, place-and-route tools
Responsibilities
Design and implement high-performance DSP IP; Contribute to specification, RTL design, timing closure, and power optimization; Develop and optimize high-speed arithmetic circuits; Perform datapath synthesis and STA; Collaborate with architecture, verification, and physical design teams; Support formal verification and design validation; Participate in design reviews and provide technical leadership
Seniority
Senior, hands-on IC
