Principle Engineer - SoC Design Verification
Core
Lead verification strategy and execution for complex ARM-based SoCs, focusing on low-power design, security IPs, and multiple interface verification.
Role type
Principal SoC Design Verification Engineer
Builds
Production SoCs with verified functionality, power efficiency, and security compliance
Domain
Semiconductor / SoC Design / Microcontrollers
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work -> product features (SoC verification)
Required skills
SystemVerilog, UVM, constrained-random verification, SVA, functional coverage, low-power verification (UPF), gate-level simulation, EDA tools (Synopsys VCS, Cadence Xcelium, Mentor Questa), ARM microcontroller architecture, interface verification (SPI, I2C, UART, USB, PCIe, Ethernet, eSPI)
Preferred skills
Flash memory verification, security IP verification (crypto engines), Analog IP knowledge (ADC, DAC, PLLs)
Responsibilities
Define and own SoC-level and IP-level verification strategy and coverage goals; Develop, debug, and run UVM-based verification environments for RTL/netlist simulation; Create stimulus and assertions, run regression, and analyze code/functional coverage; Mentor team members and collaborate with design teams for issue resolution and sign-off; Ensure compliance with functional safety/security requirements
Seniority
Principal, hands-on IC with leadership
