Logic Design Engineer
Core
Architect, develop, and implement Ethernet/networking IP (including TSN) for next-generation SoCs in automotive, industrial, and edge computing markets.
Role type
Senior IC logic design engineer (networking IP)
Builds
Scalable Ethernet IP cores for SoC integration
Domain
Semiconductor hardware design, networking protocols (Ethernet, TSN)
Deliverable
production ML models | product features
Required skills
Verilog RTL design, logic synthesis, timing closure, micro-architecture design, front-end design tools, performance/area/complexity trade-off analysis
Preferred skills
TCP/IP protocols, router/bridge/switch data products, security/cryptography, algorithm development, SoC integration experience
Technologies
Verilog, IEEE TSN, Lint, CDC, Synthesis, STA, LEC
Responsibilities
Architect and implement Ethernet IP; perform trade-off analysis; ensure IP quality checks (Lint/CDC/Synthesis/STA/LEC); provide technical leadership and code reviews; collaborate with verification and integration teams; drive design methodology improvements
Seniority
Mid-level to Senior, hands-on IC
