Senior Lead Engineer - IP Verification
Core
Deliver first-pass success of complex IPs using advanced verification languages and methodology, addressing verification challenges across IP, SubSystem, and overall system contexts.
Role type
Senior Lead Engineer - IP Verification
Builds
Complex IPs and SubSystems for automotive, graphics, and vision accelerator domains
Domain
Semiconductor IP verification (automotive, graphics, vision)
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
UVM, SystemVerilog, C++, Verilog, VHDL, PLI/DPI, NCSim, VCS, ModelSim, Questa, ARM cores, AHB/AMBA, AXI, memory controllers, formal verification, assertions/SVA, functional coverage, gate-level simulation, verification planning, regression management
Preferred skills
Automotive Graphics/Vision accelerators, pre-silicon validation/emulation, strong ability to drive verification methodologies
Technologies
UVM, SystemVerilog, C++, Verilog, VHDL, PLI, DPI, NCSim, VCS, ModelSim, Questa, ARM, AHB, AMBA, AXI
Responsibilities
Evaluate and deploy evolving verification methodologies for complex IP/SubSystem designs; Own and ensure quality adherence during all project stages; Build and influence technological innovations; Participate in pre/post silicon validation
Seniority
Senior, hands-on IC
