Staff Engineer - RTL Design
Core
Designing high-performance digital logic subsystems and SoC integration using ARM cores, bus protocols, and interconnects.
Role type
Staff Engineer - RTL Design
Builds
Subsystems and System-on-Chip (SoC) RTL integrations
Domain
Semiconductor / Hardware Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
High-performance digital logic design, SoC integration, ARM cores, Bus protocols, Interconnects, LINT/CDC/RDC signoff, SoC design flow, Synthesis, RTL simulation, Debugging
Preferred skills
ISO26262 functional safety, IP integration reviews, BE reports reviews
Technologies
Synopsys VCS, Cadence RTL simulator, Design Compiler (DC), RTL Compiler (RC/Genus), Verdi
Responsibilities
Building Subsystems and/or SoC RTL integration, Performing LINT/CDC/RDC signoffs, Conducting IP Integration reviews and BE reports reviews
Seniority
Senior, hands-on IC
