SoC Verification Lead Engineer
Core
Lead verification engineering for complex SoC designs, defining methodologies and driving full-chip validation.
Role type
Senior IC SoC Verification Lead Engineer
Builds
Production SoC chips with CPU subsystems, interconnects, and memory
Domain
Semiconductor / SoC Design / Hardware Verification
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work -> product features (SoC chips)
Required skills
UVM, SystemVerilog, Verilog, C/C++, Python, SoC architecture, directed and constrained random verification, gate-level simulation, formal verification, regression testing, root-cause analysis
Preferred skills
ARM architecture, AXI/PCIe/Ethernet/USB protocols, firmware co-verification, mentoring
Technologies
UVM, SystemVerilog, Verilog, Python, Shell, AXI, AHB, APB, PCIe, Ethernet, USB, ARM
Responsibilities
Define verification plans and coverage strategies; Architect and implement UVM-based verification environments; Drive block-level, subsystem-level, and full-chip verification; Develop and maintain testbenches including agents, sequences, drivers, monitors, and scoreboards; Integrate industry-standard VIPs; Lead SoC integration verification including CPU subsystems and interconnects; Validate boot flows and firmware interactions; Collaborate with firmware and software teams for HW/SW co-verification; Perform root-cause analysis of functional and performance issues; Own functional and code coverage closure; Drive regression and failure triage; Mentor junior and mid-level verification engineers
Seniority
Senior, hands-on IC with technical leadership
