Digital Verification Engineer
Core
Developing and verifying digital hardware architectures and security features for high-end security IP.
Role type
Digital Verification Engineer (Hardware Security)
Builds
Security IP for Automotive, Microcontrollers, Banking/Mobile, and Connectivity markets
Domain
Hardware Security / Electronics Engineering
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
SystemVerilog, UVM (Universal Verification Methodology), Constrained Random Verification, Metrics-Driven Verification, SystemVerilog Assertions (SVA), Coverage Closure, Debugging complex verification environments
Preferred skills
Formal Verification methods
Technologies
SystemVerilog, UVM, Constrained Random Verification, SVA
Responsibilities
Verify digital hardware architectures; Create, review, and maintain verification plans; Specify and develop verification strategies, tests, and environments for security features; Introduce emerging verification methodologies into existing flows
Seniority
Mid-level, hands-on IC
