Sr Engineer, Adv DRAM PI
Core
Lead technology integration and device architecture development for next-generation layered memory technology, bridging device physics and materials science to enable manufacturable solutions for AI and VR applications.
Role type
Sr Engineer, Advanced DRAM Process Integration
Builds
Novel layered memory devices (charge storage devices, thin-film transistors) and advanced node technologies
Domain
Semiconductor manufacturing / Memory technology / Device physics
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Semiconductor process integration, Device physics, Experiment design (DOE), Multi-functional team leadership, Complex project management, Yield improvement analysis, Failure mechanism analysis, Process flow optimization, Architecture development, Technology pathfinding
Preferred skills
Mainstream memory technologies (DRAM, NAND), Circuit and architecture scaling knowledge, Non-conventional architecture R&D experience
Technologies
R&D fab equipment, Thin-film transistors (TFTs), Charge storage devices, Inline defect analysis tools, Parametric data analysis systems
Responsibilities
Lead technology integration activities for new layered memory devices, Develop and integrate new device architectures from concept to silicon, Optimize process flows for performance and reliability, Build and complete experiments in the R&D fab, Analyze inline, defect, and parametric data to drive yield improvement, Communicate complex technical findings to technical and non-technical audiences
Seniority
Senior, hands-on IC with strategic R&D impact