Staff ASIC Validation Engineer (Chaz/Characterization))
Core
Lead first-silicon bring-up, board validation, and early silicon debug for high-speed memory and storage products.
Role type
Staff ASIC Validation Engineer (Characterization)
Builds
High-performance DRAM, NAND, and NOR memory and storage products
Domain
Semiconductor / Memory and Storage / High-Speed Interfaces
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
High-speed post-silicon electrical characterization, Signal integrity (SI), Power integrity (PI), Timing analysis, Jitter analysis, Noise coupling analysis, Channel loss analysis, SerDes characterization, DDR/LPDDR/PCIe experience, Lab equipment operation (Oscilloscopes, BERTs, VNAs), Python/MATLAB automation, Root-cause analysis, CMOS fundamentals, Analog/digital circuits knowledge
Preferred skills
ATE correlation, JEDEC/PCI-SIG standards familiarity, Board design collaboration, Simulation correlation
Technologies
Python, MATLAB, Oscilloscopes, BERTs, VNAs, Spectrum analyzers, Waveform generators
Responsibilities
Lead first-silicon bring-up, board validation, and early silicon debug; Develop and execute electrical characterization plans covering DC, AC, parametric, and functional measurements; Characterize high-speed interfaces (DDR/LPDDR, SerDes, MIPI, UFS); Perform post-silicon electrical characterization across PVT corners; Conduct signal integrity, power integrity, jitter, and eye-diagram testing; Debug silicon issues related to timing, noise, stability, and functional failures; Develop automation scripts for data collection and analysis; Correlate post-silicon results with simulation and pre-silicon expectations; Propose design enhancements to tackle next-generation challenges.
Seniority
Staff, hands-on IC
