Principal Analog Design Engineer, HBM
Core
Lead the design, integration, and delivery of advanced analog and mixed-signal IPs for High Bandwidth Memory (HBM) products, enabling high-performance analog subsystems within the HBM logic die.
Role type
Principal Analog Design Engineer (HBM)
Builds
High Bandwidth Memory (HBM) logic dies and analog subsystems
Domain
Semiconductor / Memory / Analog IC Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work -> product features (Analog IPs for HBM)
Required skills
High-speed interface design, Clocking circuits (PLL/DLL/CDR), Power management circuits, Analog IP integration at subsystem or SoC level, SPICE simulation, extraction, and modeling, Silicon bring-up and lab validation, Advanced CMOS processes, Noise and jitter analysis, SI/PI and cross-domain coupling effects
Preferred skills
DRAM sub-system architecture knowledge, Physical Layout & Circuit Floor Planning
Technologies
SPICE, Advanced CMOS processes
Responsibilities
Lead design of high-speed transmitters, receivers, clock generation/distribution, SerDes analog blocks, biasing, reference, calibration, and power delivery circuits; Define IP interfaces, power domains, clocking schemes, and reset strategies; Perform pre/post-layout simulations and PVT/Monte Carlo/aging analyses; Collaborate with layout engineers on floorplanning, symmetry, matching, shielding, and EM/IR compliance; Review and sign off on analog layouts; Drive layout-aware build optimizations for advanced nodes.
Seniority
Principal, hands-on IC design & technical leadership
