Principal HBM Design Architect
Core
Design, simulate, and optimize digital, analog, and mixed-signal DRAM circuits for next-generation high-bandwidth memory (HBM) products supporting Machine Learning and AI applications.
Role type
Principal HBM Design Architect
Builds
Next-generation HBM solutions with TSV-based 3D integration and high-speed mixed-signal architectures
Domain
Semiconductor / Memory / High-speed digital and analog circuit design
Deliverable
production ML models
Required skills
CMOS circuit design, semiconductor device physics, schematic entry, circuit simulation (Finesim, HSPICE), power distribution analysis, scripting (Python, Tcl, Perl), timing optimization, area/power/complexity trade-offs
Preferred skills
DRAM or memory design fundamentals, complex design challenge resolution
Technologies
Finesim, HSPICE, Python, Tcl, Perl
Responsibilities
Design and analyze digital, analog, and mixed-signal circuits for HBM DRAM products; Perform schematic entry, simulation, and optimization of DRAM blocks including data path, ECC, command control, and clocking circuits; Evaluate full-chip and block-level functionality; Conduct pathfinding and feasibility studies for next-generation HBM architectures; Optimize circuit timing, area, power, and complexity; Support design floor planning, layout reviews, and cross-domain integration; Contribute to verification and validation strategies
Seniority
Principal, hands-on IC