CareerPlan

RTL Design Engineer - MTS

Hyderabad - Phoenix Aquila, IndiaFull-time2026-04-06 → 2026-11-12

Core

Own the overall logic design of the on-chip memory controller for new memory products, including optimizations, pathfinding, and architecture specification.

Role type

Senior IC RTL Design Engineer (Memory Controller)

Builds

On-chip memory controllers for NAND products

Domain

Semiconductor / Memory Storage

Deliverable

production ML models | product features

Required skills

RTL design, Verilog, logic design, circuit conception, design architecture, performance/area/power optimization, team leadership, project management, code reviews, mentorship, verification planning, netlist bring up, simulation, silicon validation, cross-functional collaboration

Preferred skills

Standard cell development, simulation, voltage expertise, competitor analysis

Technologies

Verilog, RTL, synthesized netlist, gate level verification

Responsibilities

Define and build design architecture spec documents for new features; Plan and prioritize projects and manage designers; Perform RTL and synthesized netlist verification at block, subsystem, and fullchip level; Create verification plan for new and existing features; Mentor new hires and supervise progress; Collaborate with Device, System, Probe, Test, CAD, Field Application Engineers, and Product Engineering groups