Principal Engineer: Mixed Signal Design (m/f/d)
Core
Design and verify digital and mixed-signal blocks for next-generation GDDR and DDR DRAM memory products.
Role type
Principal Mixed-Signal Design Engineer
Builds
High-performance, high-reliability DRAM solutions for datacenter, AI, automotive, and gaming applications
Domain
Semiconductor / Memory / Mixed-Signal Design
Deliverable
production ML models | product features
Required skills
Mixed-signal circuit design, Digital circuit design, Semiconductor physics, RTL design, Gate-level design, Schematic design, Functional verification, Testbench development, EDA tools (Spice, SystemVerilog, PrimeTime), Scripting (Python, TCL)
Preferred skills
Memory design experience
Technologies
Spice, Primesim, SystemVerilog, Design Compiler, PrimeTime, Xcelium, Spyglass, Python, TCL
Responsibilities
Design digital and mixed-signal blocks at transistor, gate, and RTL levels; Define interface, behavior, and functional requirements for mixed-signal blocks; Collaborate with block owners and integration teams; Develop testbenches; Perform functional and gate-level verification; Support silicon bring-up and design validation activities
Seniority
Principal, hands-on IC