CareerPlan

PhD Research Intern, AI Accelerator Design and VLSI - 2027

US, CA, Santa ClaraInternship2026-10-27 → 2026-11-10

Core

Researching novel AI hardware accelerator architectures, VLSI design techniques, and AI/HW co-design methodologies to optimize machine learning workloads.

Role type

PhD Research Intern (AI Accelerator Design & VLSI)

Builds

Research prototype testchips and novel ASIC/VLSI design flows

Domain

Semiconductor / AI Hardware / VLSI

Deliverable

research

Required skills

Machine learning fundamentals, Quantization and numerical methods, Digital VLSI circuits, SystemVerilog/C++, Python/PyTorch, High-Level Synthesis (HLS), EDA tool flows

Preferred skills

Tapeout experience, Agentic AI for hardware design, Automated design tool flows

Technologies

PyTorch, SystemVerilog, C++, HLS tools, Modern EDA tool flows

Responsibilities

Design accelerators for AI workloads, Research innovative ASIC/VLSI design techniques, Develop numerical methods for quantization and tensor decomposition, Collaborate on research prototype testchips, Plan to publish and present original research

Seniority

PhD Student, Research Intern