Senior Verification Engineer, Emulation and Prototyping
Core
Build and optimize emulation and FPGA environments to validate next-generation GPUs, SOCs, NICs, and Switches, enabling pre-silicon software development and high-speed system validation.
Role type
Senior IC verification engineer (emulation & FPGA prototyping)
Builds
Production-ready emulation/FPGA platforms and validation infrastructures for NVIDIA ASICs
Domain
Semiconductor hardware design and verification
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
FPGA prototyping, hardware emulation, RTL synthesis, place-and-route, SV/Verilog testbenches, C/C++ transactors, DPI/PLI/SystemC interfaces, PCIe/CXL/NVLINK protocols, emulation platform expertise (ZeBu/Veloce/Z3)
Preferred skills
Python/Perl scripting, QEMU/KVM, high-performance processor/SOC emulation background, Cadence/Synopsys/Siemens transactor solutions
Technologies
Synopsys ZeBu, Siemens Veloce, Cadence Z3, ProtoCompiler, Synplify Premier, Xilinx Vivado, C/C++, Python, Perl, SV, Verilog
Responsibilities
Build emulation/FPGA environments via RTL partitioning and synthesis flows; optimize platform performance and generate bitstreams; develop high-level C/SV testbenches; bring up designs and drive complex debug; scale verification methodology; enable pre-silicon software validation and performance analysis; develop emulation-friendly validation infrastructures
Seniority
Senior, hands-on IC
