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Senior Reliability Engineer

US, CA, Santa Clara💼 Full-time💰 $116,000–$116,000🗓 2026-06-10 → 2026-09-25

Core

Design and operate High-Temperature Operating Life (HTOL) test systems to ensure the reliability of advanced silicon chips for AI and digital twins.

Role type

Senior IC reliability engineer (hardware testing)

Builds

Next-generation HTOL boards and test processes for semiconductor devices

Domain

Semiconductor manufacturing / Hardware reliability

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

HTOL stress testing, JEDEC standards, thermal management, burn-in board design, signal integrity debugging, data analysis, Python/MATLAB programming, test equipment operation

Preferred skills

Multi-die configuration thermal analysis, high-power GPU/SoC burn-in board design, reliability analytics (JMP, Weibull, Arrhenius), AI/ML for predictive failure modeling

Technologies

MCC HTOL chambers, oscilloscopes, current probes, ATE systems, JMP, Python, MATLAB

Responsibilities

Implement and optimize HTOL test programs aligned with JEDEC standards; Operate and maintain HTOL ovens for efficient testing; Build and debug burn-in boards to resolve signal-integrity and thermal issues; Apply thermal management techniques to control temperature and mitigate stress; Collaborate with vendors to improve burn-in boards and thermal interface materials; Maintain and improve the reliability database

Seniority

Senior, hands-on IC

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