Senior ASIC Design Engineer
Core
Design and implement high-performance, area, and power-efficient RTL for world-leading SoCs and GPUs, including architecture and micro-architecture design.
Role type
Senior ASIC Design Engineer (RTL & Architecture)
Builds
SoCs and GPUs for consumer graphics, self-driving cars, and AI
Domain
Semiconductor / VLSI / Computer Architecture
Deliverable
production ML models | product features
Required skills
RTL design and synthesis, Verilog/System Verilog, logic and timing verification, Perl/Python scripting, test bench development, assertion-based verification
Preferred skills
Embedded processor design, random stimulus verification, functional coverage methodologies
Technologies
VCS, Verdi, GDB
Responsibilities
Document and deliver verified RTL meeting design targets; define verification scope and support verification infrastructure development; collaborate with global ASIC development teams
Seniority
Senior, hands-on IC
