Physical Design Backend Engineer
Core
Physical design of high-speed communication chip blocks targeting optimal power, area, and performance under challenging constraints.
Role type
Senior IC physical design engineer (silicon)
Builds
High-speed networking silicon chips (FC blocks)
Domain
Semiconductor / Networking Silicon
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
RTL2GDS flows, PNR, STA, physical verification (LVS/DRC), timing closure, power and noise analysis, place and route, high cell count design, HS blocks
Preferred skills
Synopsys, Cadence EDA tools
Responsibilities
Synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, physical verification, resolving complex timing and congestion problems
Seniority
Senior, hands-on IC
