Senior Mixed Signal Design Engineer
Core
Design high-speed analog and mixed-signal circuits for next-generation NVLINK interfaces, handling data rates of 25Gbps and higher from concept through silicon characterization.
Role type
Senior IC mixed-signal design engineer (high-speed interfaces)
Builds
High-speed analog circuits and interfaces for NVLINK technology
Domain
Semiconductor / High-speed data interfaces / AI infrastructure
Deliverable
production ML models
Required skills
Deep-submicron CMOS analog/mixed-signal design, FINFET process experience, high-speed interface design, schematic design, circuit verification, behavioral modeling, noise/loop stability analysis, EDA tool proficiency (Cadence Virtuoso, Spectre, Hspice)
Preferred skills
Post-silicon bring-up and debugging, floorplanning for matching and high-speed routing, test bench environment creation
Technologies
Cadence Virtuoso, Spectre, Hspice, Finesim, XA
Responsibilities
Define circuit requirements and complete design from schematic to layout and verification, conduct schematic design for deep-submicron CMOS, optimize circuits for system performance, collaborate with layout engineers on floorplanning and routing, support post-silicon bring-up and debugging
Seniority
Senior, hands-on IC