MGR, OMT TECH PI1 CMOS&MOL0
Core
Manage technology PI activities, lead teams to achieve job assignments, and enhance efficiency using AI agents to support daily operations.
Role type
Senior IC manufacturing process engineer (yield & defect management)
Builds
High-performance DRAM, NAND, and NOR memory and storage products
Domain
Semiconductor manufacturing (wafer fabrication)
Deliverable
production ML models
Required skills
yield maximization, root cause analysis, process deviation control, defect investigation, product evaluation, process improvement research
Preferred skills
AI agent utilization, cross-functional collaboration with shift engineering
Technologies
wafer fabrication tools, process recipes, defect analysis systems
Responsibilities
Maximize yield by working on tools, processes, or wafer fabrication recipes; troubleshoot wafer fabrication problems and perform root cause analysis; work with other process areas to understand and control process deviations; conduct long-term investigation of defect issues; evaluate products to ensure they meet design and performance specifications; conduct research to assess process adjustment requirements and recommend improvements.
Seniority
Manager, hands-on IC