CareerPlan

Senior/Principal Design Automation Engineer, Simulation

Jalisco, MexicoFull-time2026-10-27 → 2026-11-10

Core

Develop, optimize, and implement build verification flows and EDA tools for HBM and DRAM circuit simulation and verification.

Role type

Senior/Principal IC design automation engineer (simulation)

Builds

Scalable software automation and AI-assisted workflows for circuit simulation and verification

Domain

Semiconductor memory (HBM, DRAM) and EDA

Deliverable

production ML models

Required skills

Analog circuit simulation flows, custom IC design platforms, Python, Perl, Linux, shell scripting, Tcl, Cadence SKILL, CMOS concepts, parasitic extraction, EM/IR analysis, Static Timing Analysis (STA)

Preferred skills

AI-enabled methodologies for simulation/verification, object-oriented programming

Technologies

FineSim, PrimeSim, XA, Spectre, VCS, Xcelium, Cadence Virtuoso, Virtuoso-L, Virtuoso-XL, Synopsys Custom Compiler, StarRC, Quantus

Responsibilities

Collaborate with memory design teams to optimize EDA tools and simulation flows; Build scalable software and automation; Partner with EDA vendors to integrate tools; Lead development of AI-assisted automation for verification workflows

Seniority

Senior/Principal, hands-on IC with mentorship