Staff Engineer, Design
Core
Design and validation of high-speed Datapath and DDR interfaces for Flash Memory products, integrating circuit design with AI-driven methodologies.
Role type
Staff Engineer, Analog/Mixed-Signal Circuit Design
Builds
High-speed memory interface blocks and sub-systems for non-volatile memory products
Domain
Semiconductor / Memory / High-Speed Digital & Analog Circuits
Deliverable
production ML models | product features
Required skills
Analog/mixed-signal CMOS circuit design in deep sub-micron technologies (5–40 nm), High-speed memory interface design (DDR3/4/5, LPDDR, GDDR, SerDes), Plane Datapath design, RTL/Verilog-A/SystemVerilog modeling, AI-enabled design approaches, DTCO (Design-Technology Co-Optimization), CMOS device physics, Layout signoff and parasitic-aware design, EDA tools (Cadence ADE/Virtuoso, Spectre, Calibre, MATLAB)
Preferred skills
Experience with parallel/serial interfaces, Application Engineering collaboration, Cross-functional technical leadership
Technologies
HSPICE, Fast SPICE, NC Verilog, Cadence ADE/Virtuoso, Spectre, Calibre, MATLAB, Python, ISO26262
Responsibilities
Define and execute integrated Analog/Mixed-Signal (AMS) solutions combining circuit and digital/RTL techniques, Develop block-level Micro-Architecture Specifications (MAS) adhering to industry standards, Supervise complex analog layouts and drive parasitic-aware design methodologies, Collaborate with Technology Development and Product teams on DTCO initiatives, Perform high-speed circuits functional and timing validation from base cells to full-chip level
Seniority
Staff, hands-on IC with technical leadership