MTS Yield Deviation/YT Engineer
Core
Lead efforts to identify, characterize, and resolve yield loss mechanisms impacting high-volume semiconductor manufacturing performance using advanced analytics and failure analysis.
Role type
Senior IC Yield Deviation/YT Engineer
Builds
High-volume memory and storage products
Domain
Semiconductor manufacturing (DRAM/Storage)
Deliverable
production ML models | product features
Required skills
Semiconductor physics, transistor operation, CMOS characterization, statistical analysis, root cause investigation, data analysis tools (JMP, Python), defect characterization, process correlation
Preferred skills
DRAM manufacturing experience, yield-tail analysis, AI-assisted analytics, automation development
Technologies
JMP, Python, AI-enabled tools, EFA/PFA systems
Responsibilities
Monitor probe yield performance to identify deviations and failure signatures; Lead MBPS and root cause investigations using hypothesis-driven problem solving; Drive defect characterization and failure analysis activities; Partner with cross-functional teams to implement corrective actions; Develop and deploy analytics, dashboards, and AI-enabled workflows
Seniority
Senior, hands-on IC
