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Intern - DRAM Process Integration

Boise, ID - Main Site💼 Internship🗓 2026-08-13 → 2026-09-26

Core

Develop next-generation DRAM memory technologies through multi-functional collaboration involving process integration, device engineering, materials development, and process architecture.

Role type

Intern, Process Integration Engineer

Builds

Future DRAM architectures and memory technologies

Domain

Semiconductor / Memory / DRAM

Deliverable

production ML models | product features | research

Required skills

Semiconductor process integration, device physics, technology scaling principles, Design of Experiments (DOE), statistical analysis, data-driven problem-solving

Preferred skills

PhD in Electrical Engineering/Microelectronics, technical leadership in R&D, innovative solution development, AI/Generative AI for technical research, statistical modeling, machine learning for semiconductor process development

Technologies

AI tools, AI-Assisted tools, Generative AI, AI-Enabled tools

Responsibilities

Define technology achievements, design rules, structural requirements, and electrical specifications for next-generation DRAM; Collaborate with process development, simulation, process architecture, circuit design, and quality teams; Develop and maintain documentation related to process integration plans, technical risks, issue resolution, and characterization strategies; Evaluate alternative device architectures, process enablers, and scaling approaches; Leverage approved AI and AI-Assisted tools to enhance technical analysis and engineering decision-making

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