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Sr Engineer, DPG Compute PE Y/Q

Boise, ID - Main Site💼 Full-time🗓 2026-07-17 → 2026-07-31

Core

Senior technical design leadership role accountable for DRAM yield, quality, speed, and product grade strategy deliverables, leading cross-site execution and data-driven decisions across the full product lifecycle.

Role type

Senior IC DRAM Product Engineering (Yield & Quality)

Builds

High-performance DRAM memory products

Domain

Semiconductor manufacturing (DRAM)

Deliverable

production ML models | product features | dashboards & analysis | client delivery | infrastructure

Required skills

Yield analysis, quality data analysis, risk-based decision making, cross-functional technical leadership, global team coordination, corrective action planning

Preferred skills

DRAM failure mode analysis, disposition strategies, yield recovery methods, fab/backend test/assembly/module interface experience, technical leadership beyond direct ownership

Technologies

AI tools for job functions

Responsibilities

Own yield, quality, speed and product grade strategy deliverables; Lead yield improvement and disposition decisions using risk-based, data-driven methods; Align and drive execution across fab, test, assembly, module, quality, and operations teams; Represent product health, risks, and recovery plans in leadership and customer forums; Lead coordinated response during yield events, excursions, and critical issues; Use AI in applicable job functions

Seniority

Senior, hands-on IC

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