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Senior Engineer, DRAM PATHFINDING PI

Hiroshima - Fab 15, Japan💼 Full-time🗓 2026-07-12 → 2026-07-31

Core

Derive construction specifications, design and analyze experiments, and optimize process flows to enhance yield, performance, and reliability for DRAM manufacturing.

Role type

Senior Process Integration Engineer (DRAM)

Builds

High-performance DRAM memory and storage products

Domain

Semiconductor manufacturing / Memory technology

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

Statistical analysis, JMP software, model-based problem solving, process optimization, cross-functional collaboration, technical documentation, yield enhancement, defect analysis, parametric analysis, probe data analysis

Preferred skills

Patents, technical papers, process module development, alternative flow design

Technologies

JMP

Responsibilities

Derive construction specifications based on electrical metrics and design rules; Design, execute, and analyze experiments to meet engineering specifications; Optimize existing process flows and develop creative solutions; Extract, monitor, and analyze inline, defect, param, and probe data to fix yield issues; Work cross-functionally with Design, Product Engineering, Modeling, and Quality teams; Summarize complex problems and drive team execution; Define sub-milestones for projects; Maintain communication between Process Integration, Process Development, and Pilot Fab.

Seniority

Senior, hands-on IC

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