ENGINEER, APTD Wafer Thinning / CMP process
Core
Drive improvement in wafer thinning / CMP process performance and coordinate experiments for technology development and yield improvement in advanced packaging.
Role type
Process Engineer (Wafer Thinning / CMP)
Builds
Advanced package technology (chip stacking, 2.5D or 3D) research and development
Domain
Semiconductor manufacturing / Advanced Packaging
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Si grinding, Edge Trim, Si CMP, Cu CMP, Oxide CMP technologies, CMP metrics analysis (Planarity, RR, selectivity, dishing, erosion, surface roughness, defectivity), materials characterization, mechanical characterization and testing, test structure and test vehicle design, supplier technical discussions
Preferred skills
Master's degree or PhD in Chemistry, Physics, Material, or engineering science, experience in semiconductor industry, independent thinking, team collaboration
Technologies
CMP equipment, grinding equipment, mechanical testing tools
Responsibilities
Drive improvement in wafer thinning / CMP process performance, Coordinate experiments for technology development and yield improvement, Assist advanced package technology (chip stacking, 2.5D or 3D) research and development, Support project on-site execution and make decisions as technical consultant, Troubleshoot a variety of complex problems. Perform root cause analysis and resolve process engineering issues, Generate internal and external documentation for presentations and technical reports
Seniority
Mid-level, hands-on IC
