Quality and Reliability Engineer
Core
Ensure product and bumping process quality/reliability from wafer fab through packaging/assembly for Intel's 3D Foveros and traditional packages.
Role type
Manufacturing Quality and Reliability Engineer (Semiconductor Packaging)
Builds
C4 bumping and interconnect quality for WPM (3D Foveros) and ATM (traditional assembly)
Domain
Semiconductor Manufacturing / Advanced Packaging
Deliverable
production ML models | product features
Required skills
Solder joint reliability analysis, excursion management, failure mode analysis, root cause analysis (8D), statistical data analysis, data mining, material disposition systems, cross-functional collaboration
Preferred skills
Influencing skills for quality mindset, managing Material Review Boards (MRBs)
Technologies
Data extraction tools, custom scripting, statistical analysis tools, eDispo screens
Responsibilities
Manage manufacturing excursions and drive containment strategies; Provide technical input on thermomechanical interactions; Collaborate on systemic Corrective actions; Develop early detection systems for excursions; Support factory operations output commits; Support technology certification and ramp activities; Analyze inline, EOL, and Reliability data using statistics and machine learning
Seniority
Mid-Senior, hands-on IC
