Senior/Principal Hardware ASIC Validation Engineer
Core
Design, simulate, and validate analog and mixed-signal ASICs from transistor-level architecture through silicon bring-up, characterization, and manufacturing release.
Role type
Senior/Principal Analog ASIC Validation Engineer
Builds
High-performance analog and mixed-signal ICs for defense, space, and biomedical applications
Domain
Semiconductor hardware engineering (Analog/Mixed-Signal ASICs)
Deliverable
production ML models | product features | infrastructure
Required skills
Transistor-level circuit design, system-level design, hardware feasibility evaluation, physical layout and floor-planning, statistical data analysis, test solution development, schematic design, PCB design, silicon debug, yield analysis
Preferred skills
Low power circuit design, CMOS advanced nodes below 32nm, radiation-hardened electronics
Technologies
ATE platforms, multi-site test hardware, extracted parasitics simulation tools
Responsibilities
Design and simulate circuits at transistor-level, optimize hardware designs for performance/power/cost, perform physical layout and floor-planning, develop wafer-level and IC test solutions, execute silicon debug and correlation, define test schematics and design PCBs, manage project schedules
Seniority
Senior/Principal, hands-on IC with mentorship responsibilities
