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Testsite Engineer, Quantum

Essex Junction, US💼 Full-time💰 $98,000–$98,000🗓 2026-09-24 → 2026-09-25

Core

Design, develop, and utilize in-house semiconductor test chips and test structures to characterize emerging technologies and generate electrical data.

Role type

Semiconductor testchip and testsite design engineer

Builds

In-house test chips, test structures, and silicon implementations for technology characterization

Domain

Semiconductor manufacturing / IC design / Device physics

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

Semiconductor device knowledge, IC design and layout, electrical characterization, silicon data analysis, design-to-mask flows (schematic, layout, DRC/LVS, extraction, simulation)

Preferred skills

CMOS process technology understanding, device physics, EDA tool proficiency, cross-functional collaboration, project management

Technologies

EDA environments, DRC/LVS tools, extraction tools, simulation software

Responsibilities

Design and develop test chips and structures for technology characterization; Collaborate with technology and product teams to define testsite requirements; Execute electrical characterization of fabricated test chips; Analyze silicon data to identify trends and performance gaps; Iterate designs based on measurement results; Document architecture and technical conclusions

Seniority

Mid-level to Senior, hands-on IC engineer

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