Sr Principal Design Engineer
Core
Designing CPU microarchitecture blocks from early exploration through detailed specification and RTL implementation to define next-generation computing solutions.
Role type
Sr Principal Design Engineer (CPU Microarchitect)
Builds
Scalable, energy-efficient CPU microarchitectural blocks and IP
Domain
Semiconductor / CPU Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
CPU microarchitecture design, RTL development (Verilog/System Verilog/VHDL), logic design, performance modeling, verification support, physical design convergence
Preferred skills
Timing/power/area trade-offs, high-performance CPU techniques, ISA knowledge (RISC-V/ARM-v8/x86), scripting, assembly/C/C++ programming, emulator usage
Technologies
Verilog, System Verilog, VHDL, commercial simulators, debugging tools, emulators
Responsibilities
Create microarchitectural specifications for major blocks, perform RTL design and implementation, support verification team with test bench and plan development, collaborate with physical design and testability teams
Seniority
Sr Principal, hands-on IC with technical leadership
