Quantum Cryo CMOS Design Enablement
Core
Developing cryogenic CMOS Process Design Kits (PDKs) and design flows to enable quantum and cryogenic technologies by translating device physics and process innovations into usable design collateral.
Role type
Member of Technical Staff (MTS), cryogenic CMOS design enablement
Builds
Cryogenic CMOS PDKs, compact models, test chips, and design flows for quantum applications
Domain
Semiconductor manufacturing, cryogenic electronics, quantum computing hardware
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
device modeling, electrical characterization, test structure design, EDA tool integration, data analysis, parameter extraction, silicon validation
Preferred skills
cryogenic electronics experience, PDK development, variability modeling, quantum computing hardware exposure
Technologies
EDA tools, semiconductor design flows, compact model implementations
Responsibilities
Develop cryogenic CMOS PDKs including compact models and parameter extraction; correlate silicon data with simulations for predictive accuracy; design and execute electrical characterization plans; implement test structures and test sites; analyze characterization data to identify trends and improve design rules; collaborate with EDA vendors on modeling capabilities; document methodologies for knowledge transfer
Seniority
Mid-level IC engineer, hands-on technical contributor
