Princ Engineer Design Enablement Testsite
Core
Design, develop, and utilize in-house chip testsites to understand semiconductor technology and customer designs.
Role type
Principal Engineer, Design Enablement (Testsite)
Builds
In-house chip designs and test structures for technology development
Domain
Semiconductor manufacturing / Chip design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Chip development, electrical data extraction, design masking, data analytics, Pcells/wiring scripting, DRC interpretation, automation debugging, Cadence Virtuoso, Mentor Graphics Calibre
Preferred skills
Cross-timezone collaboration, safety/ESHS program support
Technologies
Cadence Virtuoso, Mentor Graphics Calibre
Responsibilities
Design chip elements to extract electrical data, evaluate and process customer designs for masking, perform analytics and tests on designed chips, execute and debug internal automation, interpret DRC results and resolve issues
Seniority
Principal, hands-on IC with strategic oversight
