Senior CPU SubSystem Verification Engineer
Core
Verify complex CPU subsystems and their integration within next-generation Arm-based platforms to deliver first-time-right silicon.
Role type
Senior IC design verification engineer (CPU subsystems)
Builds
High-performance, energy-efficient silicon solutions for Arm-based platforms
Domain
Semiconductor / CPU Architecture / SoC Verification
Required skills
SystemVerilog, UVM, Verilog, C/C++, RTL debugging, coverage closure, Arm architecture knowledge, memory hierarchy, coherency protocols
Preferred skills
CHI, ACE, AMBA, GIC, RAS, debug/trace, performance/power-aware verification (UPF), emulation, FPGA, gate-level simulation, post-silicon validation, AI-assisted verification
Technologies
SystemVerilog, UVM, Verilog, C/C++, UPF, Arm System Architecture
Responsibilities
Develop and execute verification strategies for CPU subsystems and associated IP; Verify processor subsystems including cache hierarchy, coherency, interrupt controllers, debug, trace, memory interfaces, and subsystem integration; Validate functional correctness, coherency, performance scenarios, and power management; Own verification deliverables from planning through verification closure; Architect, develop, and maintain reusable verification environments, verification IPs, methodologies, and automation; Debug RTL, testbench, integration, and system-level issues; Collaborate with architecture, design, firmware, emulation, FPGA, validation, and post-silicon teams.
Seniority
Senior, hands-on IC
