Senior Engineer
Core
Develop and verify infrastructure IP blocks (message handling, interrupt control, performance monitoring) for Arm-based SoCs using advanced verification methodologies.
Role type
Senior IC IP Verification Engineer
Builds
Infrastructure IP blocks for SoCs
Domain
Semiconductor / Hardware Verification
Required skills
SystemVerilog, UVM, constrained-random verification, coverage closure, RTL debugging, scripting (Python/Perl), functional coverage, assertions
Preferred skills
AMBA protocols (AXI, AHB, APB, CHI), SoC verification flows, interrupt handling, formal verification, emulation, low-power verification, debug/trace infrastructures (via careerplan.io/jobs/98235123728-senior-engineer-at-arm)
Technologies
SystemVerilog, UVM, Python, Perl, AMBA
Responsibilities
Develop verification plans, build SystemVerilog/UVM environments, define coverage goals, debug RTL/verification issues, complete regression testing, refine verification methodologies, participate in verification reviews
Seniority
Senior, hands-on IC
