FPGA Infra Developer
Core
Develop and maintain low-latency, high-performance FPGA infrastructure code using C++ and HLS for trading solutions.
Role type
FPGA infrastructure developer (C++/HLS)
Builds
FPGA trading infrastructure
Domain
Financial technology / Hardware acceleration (via careerplan.io/jobs/98-001-BB-561-fpga-infra-developer)
Required skills
HLS (C++), Modern C++ (17+), FPGA lower-level development, Build & synthesis optimization
Preferred skills
VHDL, Financial markets knowledge
Technologies
Vivado HLS, C++, FPGA
Responsibilities
Develop and maintain low-latency, high-performance infrastructure code written in C++ for synthesis with Vivado HLS; Develop and maintain lower-level FPGA code and optimize mid-level build & synthesis environments.
Seniority
Mid-level, hands-on IC
